Envision Employment Solutions is currently looking for a Senior RTL Design Engineer for one of our partners, an IT Services and IT Consulting company.
THE ROLE
You'll take a design from architecture to tapeout, defining the microarchitecture, writing the RTL, and making sure it's clean enough for synthesis, timing and test teams to build on. It's hands on design work on complex SoCs, with a real say in how each unit is built.
WHAT YOU'LL DO
- Own feasibility studies and help define system architecture, requirements and external interfaces
- Develop microarchitecture and logic design with functional leads, from architecture to tapeout
- Write RTL in Verilog and SystemVerilog, and run lint and CDC checks with tools such as Synopsys VC SpyGlass
- Create timing constraint files and support synthesis with Synopsys Design Compiler
- Work with synthesis, STA, PD and DFT teams to meet functional, performance, power and area goals
- Debug and fix design issues, and develop flows and scripts to support design work
WHAT WE'RE LOOKING FOR
- 7+ years of experience in VLSI design
- BSc or MSc in Electrical or Computer Engineering
- Strong Verilog and SystemVerilog skills
- Experience defining microarchitecture for complex design units, with SoC design experience
- Proficient in lint, CDC and low power design practices
- Working knowledge of synthesis and STA tools
- Familiarity with ARM, RISC-V or x86 instruction sets
- Scripting in Python and Tcl (Perl or C is a plus)
- Good understanding of verification methodologies
- Excellent English and strong communication skills
YOU'LL THRIVE HERE IF YOU
- You enjoy turning a spec into a clean, well structured microarchitecture
- You fix the root cause of a bug, not just the symptom
- You care about how your RTL behaves downstream in synthesis and timing
- You like working closely with verification, PD and DFT teams
- You want ownership of a design from first idea to silicon
